Microelectronics Engineering Group

Microelectronics Engineering Group

 Electronics Technology, Systems and Automation Engineering Department University of Cantabria
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Title:Report on logic and RTL fault modeling
Type:Report, Study or Opinion by order
Where:Deliverable 214 of the ESPRIT 8370 ESIP project
Date:1995-03
Authors: L. Entrena
L. Berrojo
S. Olcoz
P. Sánchez
E. Villar
J. Uceda
T. Riesgo
R&D Lines: Design and verification of HW/SW embedded systems
Projects: ESPRIT 8370 ESIP
ISBN:
PDF File:
Abstract:
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