| Full record |
| Title: | Power Mode Controlled Power Factor Corrector for Electronics Ballast |
| Type: | International Paper |
| Where: | IEEE Transactions on Industrial Electronics Vol. 52 No.1 pp.56-65 |
| Date: | 2005-02 |
| Authors: |
Francisco J. Azcondo
Christian Brañas
Rosario Casanueva
Salvador Bracho
|
| R&D Lines: |
Design of electronic circuits for industrial applications
|
| Projects: |
Sistemas de alimentación para lámparas de descarga y equipos de electroer...
|
| ISBN: | ISSN0278-0046 |
| PDF File: |
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| Abstract: | Medium to high power electronic ballasts are designed with two power conversion stages. The PFC stabilizes the voltage supplied to the second stage and forces the utility current to meet the required standard. The inverter section stabilizes the arc in the lamp, and keeps the lamp power under the specified values.
This paper proposes that the PFC section is to provide the power stability of the system while the inverter section operates in open loop. Consequences of this solution are: the power variation in the lamp caused by its aging is prevented, the complex dynamic of the lamp has no influence in the design, some extra voltage is available to achieve the lamp ignition, warm-up time is reduced and dimming control is easily implemented by modifying either the power reference or the bias value in the PFC control circuit. The inverter section is a half bridge LCpCs resonant inverter designed to require minimum variation of the input voltage to supply constant power to the lamp. In this way the operation point suffers little changes and no over dimension of the PFC and inverter components is necessary to meet the power source condition. |
