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Title: | Extension of the SystemC kernel for Simulation Coverage Improvement of
System-Level Concurrent Specifications |
Type: | International Conference |
Where: | Proceedings of the Forum on Design Languages (FDL’06), Darmstadt, ECSI |
Date: | 2006-09 |
Authors: |
Fernando Herrera
Eugenio Villar
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R&D Lines: |
Design and verification of HW/SW embedded systems
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Projects: |
Metodologías de especificación, análisis de prestaciones y verificación d...
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ISBN: | 3-00-019710-9 |
PDF File: |
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Abstract: | This paper presents an extension of the SystemC
reference kernel which improves the simulation-based
verification coverage of concurrent system-level
specifications. The extension facilitate the simulation
engine to perform a pseudo-random scheduling, which, in
general, results in different execution orders when several
simulations are run for a fixed input. The proposed
extension improves the quality of a system-level
verification methodology based on several simulations of
the system-level specification. |
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