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Title: | TLM interrupt modelling for HW/SW co-simulation in SystemC |
Type: | International Conference |
Where: | XXI Conference on Design of Circuits and Integrated Systems, DCIS'06 |
Date: | 2006-11 |
Authors: |
Héctor Posadas
David Quijano
Eugenio Villar
F. Escuder (DS2)
M. Martínez (DS2)
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R&D Lines: |
Design and verification of HW/SW embedded systems
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Projects: |
Medea+ 2A708 LoMoSa+
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ISBN: | 978-84-690-41444 |
PDF File: |
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Abstract: | In this paper, the PERFidiX tool developed in the ITEA Merced project, is improved with the inclusion in the abstract model of the RTOS of the interrupts generated by the HW modules. Interruptions, and in general the whole bus are modelled using the TLM standard. This ensures a wide usability of the proposed model. |
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