GIM, Publication, full record

	Microelectronics Engineering Group
Home Staff Research Teaching Doctorate Publications Tools			Thu 18-Apr-24 . 05:21

Web Map

Location

News

GIM>Research>Publication

PUBLICATION

Full record
Title:	Current fault modeling in VITAL
Type:	International Conference
Where:	VHDL International User´s Forum. Santa Clara, CA, USA
Date:	1996-02
Authors:	J. L. Barreda Pablo Pedro Sánchez Eugenio Villar
R&D Lines:	Test methods of digital and mixed integrated circuits
Projects:
ISBN:
PDF File:
Abstract:


© Copyright GIM (TEISA-UC) ¤ All rights reserved. ¤ Legal Terms	E-Mail Webmaster

Microelectronics Engineering Group