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| Title: | Optimizations in the Verification Technique of Automatic Assertion Checking with Non-linear Solver |
| Type: | International Conference |
| Where: | XXI Conference on Design of Circuits and Integrated Systems |
| Date: | 2006-11 |
| Authors: |
Iñigo Ugarte
Pablo Pedro Sánchez
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| ISBN: | |
| PDF File: | see file
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| Abstract: | This paper presents some optimizations of a verification technique based on non-linear solvers. The optimized solver is able to automatically check assertions in behavioral descriptions of hardware systems. These descriptions are modeled with a set of integer polynomial inequalities. The techniques have been evaluated with real electronic systems, such as Viterbi decoders or vocoder digital filters. |
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