Microelectronics Engineering Group

Microelectronics Engineering Group

 Electronics Technology, Systems and Automation Engineering Department University of Cantabria
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Title:Método y sistema de modelado de memoria caché
Type:National Patent
Patent Office:Oficina Española de Patentes y Marcas. OEPM
Date:2010-10
Authors: Héctor Posadas
Luis Diaz
Eugenio Villar
R&D Lines: Design and verification of HW/SW embedded systems
Projects: Artemis SCALOPES
Patent Number:P201001284
PDF File:
Abstract:This patent protects the modeling technology developed for data cache modeling in native simulation and its application to L2 memory modeling ansd performance analysis (execution times, bus traffic and power consumption).
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