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| PUBLICATION |
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| Title: | Design-for-Test Method for High-Speed ADCs: Behavioral Description and Optimization |
| Type: | International Conference |
| Where: | IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS´11), Cottbus (Germany) |
| Date: | 2011-04 |
| Authors: |
Yolanda Lechuga
Román Mozuelos
Mar Martínez
Salvador Bracho
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| Projects: |
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| ISBN: | 978-1-4244-97546 |
| PDF File: |
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| Abstract: | This paper presents a Design-for-Test (DfT) approach for folded analog to digital converters. A sensor circuit is designed to sample several internal ADC test points at the same time, so that, by computing the relative deviation among them the presence of a defect can be detected. A fault evaluation is carried out on a behavioral model to compare the coverage of the proposed test approach with the one obtained from a functional test. Then, the analysis is moved to a transistor level implementation of the ADC to establish the threshold limits for the DfT circuit that maximize the fault coverage figure of the test approach. |
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