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| Title: | Automatic synthesis of embedded SW for evaluating physical implementation alternatives from UML/MARTE models supporting memory space separation |
| Type: | International Paper |
| Where: | Microelectronics Journal, V.45, I.10, pp.1281–1291, doi: 10.1016/j.mejo.2013.11.003 |
| Date: | 2014-10 |
| Authors: |
Héctor Posadas
Pablo Peñil
Alejandro Nicolás
Eugenio Villar
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| R&D Lines: |
Design and verification of HW/SW embedded systems
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| Projects: |
FP7 288307 PHARAON
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| ISBN: | 0026-2692 |
| PDF File: |
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| Abstract: | The proposed approach presents a method for automaticallya synthesizing the SW code of complex embedded systems from a model-driven system specification. The solution is oriented to enabling easy exploration and design of different allocations of SW components in heterogeneous platforms, minimizing designer effort. The system is initially described following the UML/MARTE standard. Applying this standard, the system is modeled, describing its components, interfaces and communication links, the system memory spaces, the resource allocations and the HW architecture. From that information, a SW infrastructure containing the communication infrastructure is generated ad-hoc for the system depending on the HW architecture and the resource allocations evaluated. The consequent communication overhead reduction can result in an important advantage for system performance optimization.
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