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| PUBLICATION |
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| Full record |
| Title: | Improving the Design Flow for Parallel and Heterogeneous
Architectures running Real-Time applications: The PHARAON FP7 project |
| Type: | International Paper |
| Where: | Microprocessors and Microsystems,V.38, I.8, Part B, pp. 960–975 |
| Date: | 2014-11 |
| Authors: |
Héctor Posadas
Alejandro Nicolás
Pablo Peñil
Eugenio Villar
Florian Broekaert
Michel Bourdelles
Albert Cohen
Mihai T. Lazarescu
Luciano Lavagno
Andrei Terechko
Miguel Glassee
Manuel Prieto
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| R&D Lines: |
Design and verification of HW/SW embedded systems
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| Projects: |
FP7 288307 PHARAON
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| ISBN: | 0141-9331 |
| PDF File: |
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| Abstract: | In this article, we present the work-in-progress of the EU FP7 PHARAON project, started in September 2011. The first objective of the project is the development of new techniques and tools capable to guide and assist the designer in the development process, from UML specifications to implementation and debug on multicore platform. This tool chain will offer the possibility to propose and implement several parallelization strategies and drive the designer into implementation steps. The second objective of the project is to develop monitoring and control techniques in the middleware of the system capable to automatically adapt platform services to applications requirements and therefore reduce power consumption in a transparent manner for applications.
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