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| GIM>Research>Publications |
| PUBLICATIONS in which "Jesús Miguel Pérez" participates ordered by date |
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| 2023 |
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Morillas Pérez J, Mechó Meca S, Caballero Galindo G, J. Pérez
"Validation of the effectiveness of augmented reality-assisted vascular puncture: An experimental model "
Journal of Vascular Access. 2023-02 |
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| 2020 |
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J. Pérez, Angels Salvador, Josep Vidal, Unai Sanchez, Nuria Pastor, Ruthy Acosta, Silvia Narejos, Danielle Morrison, Francesc Lopez
"Telemedicine in the face of the COVID-19 pandemic"
Atención Primaria. 2020-04 |
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| 2013 |
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J. Pérez, A Buron, M Roman, M.A. Checa, M Sala, M Comas, C Murta-Nacismiento, X Castells, F Marcia
"Can the Gail model increase the predictive value of a positive mammogram in a European population screening setting? Results from a Spanish cohort
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The Breast
Volume 22, Issue 1 , Pages 83-88, February 2013.. 2013-02 |
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| 2011 |
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D. Calvo, J. Pérez, P. González, R. Diego, Á. Díaz, P. Sánchez
"Design, modeling and development of an efficient comunication infrastructure for networking applications"
XXVI Conference on Design of Circuits and Integrated Systems, DCIS'11. 2011-11 |
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| 2010 |
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J. Pérez, P. Sánchez
"Real-Time Voxel-Based Visual Hull Reconstruction"
XXV Conference on Design of Circuits and Integrated Systems, DCIS'10. 2010-11 |
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J. Pérez, V. Fernández
"3GPP2/802.20 RC/QC-LDPC Encoding"
IEEE European Wireless 2010, Lucca, Italy. 2010-04 |
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J. Pérez, V. Fernández, P. Sánchez
"Optimizing Data-Flow Graphs with Min/Max, Adding and Relational Operations"
Design Automation and Test in Europe 2010, DATE'10. 2010-03 |
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J. Pérez, P. Sánchez
"Belief propagation for high-definition real-time stereo matching systems"
3D Image Processing (3DIP) and Applications (IS&T/SPIE Electronic Imaging), California, USA. 2010-01 |
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| 2009 |
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J. Pérez, P. Sánchez
"Memory efficient belief propagation for high-definition real-time stereo matching systems"
IEEE International Conference in Electronics Circuits and Systems, Medina, Tunisia. 2009-12 |
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J. Pérez, P. Sánchez, M. Martínez (DS2)
"High definition Belief-Propagation based stereo matching FPGA architecture"
XXIV Conference on Design of Circuits and Integrated Systems (DCIS2009), Zaragoza, Spain. 2009-11 |
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P. Garralda, J. Pérez, P. Sánchez, M. Martínez (DS2)
"Hardware-aware algorithmic improvements of voxel-based Visual Hull reconstruction"
XXIV Conference on Design of Circuits and Integrated Systems (DCIS2009), Zaragoza, Spain. 2009-11 |
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C. Fernández, J. Pérez, P. Sánchez, M. Martínez (DS2)
"Co-Design Methodology for Real-Time and High-Definition 3D reconstruction algorithms"
XXIV Conference on Design of Circuits and Integrated Systems (DCIS2009), Zaragoza, Spain. . 2009-11 |
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J. Pérez, P. Sánchez
"Real-Time Stereo Matching using memory-efficient Belief Propagation for High-definition 3D tele-presence systems"
Iberoamerican Congress on Pattern Recognition (CIARP-2009). Guadalajara, Mexico. 2009-11 |
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J. Pérez, P. Sánchez
"High memory throughput FPGA architecture for High-Definition Belief-Propagation Stereo Matching"
IEEE International Conference on Signals, Circuits and Systems (SCS), Djerba, Tunisia. 2009-11 |
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J. Pérez, V. Fernández
"Codificador ldpc e interleaver para dvb-s2"
Oficina Española de Patentes y Marcas. OEPM . 2009-09 |
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| 2008 |
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J. Pérez, P. Sánchez, E. de las Heras
"Low-Cost Real Time Scalable Hardware Platform For Capturing And Calibrating Video"
Orlando, Florida. 2008-11 |
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J. Pérez, V. Fernández
"Reducing the error floor using a two-level permutation in structured eIRA LDPCs"
XIX Conference on Design of Circuits and Integrated Systems (DCIS2008), Grenoble, France. 2008-11 |
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J. Pérez
"APORTACIONES A LA CODIFICACIÓN Y DECODIFICACIÓN DE CÓDIGOS LDPC Y TURBO CÓDIGOS, ORIENTADAS A LA OPTIMIZACIÓN DE SU IMPLEMENTACIÓN HARDWARE"
UC. 2008-06 |
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J. Pérez, V. Fernández
"Low-Cost Enconding of IEEE 802.11n"
IET Electronics Letters
Volume 44, Issue 4, pp. 307-308. 14 Feb 2008. 2008-03 |
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| 2007 |
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J. Pérez, K. Andrews
"Low-Density Parity-Check Code Design Techniques to Simplify Encoding"
The Interplanetary Network Progress Report, Volume 42-171, Jet Propulsion Laboratory (NASA), California Institute of Technology, Pasadena, California. 2007-11 |
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| 2006 |
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J. Pérez, V. Fernández, Fernando Vallejo, Ana Jalón
"Novel DVB-S2 FEC Encoder Architecture"
9th International Workshop on Signal Processing for Space Communications. ESTEC, Noordwijk, The Netherlands. 2006-09 |
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J. Pérez, V. Fernández
"Improved Architectures for VLC MAP decoders"
IEEE International Symposium on Wireless Communication Systems (ISWCS), Valencia, Spain. 2006-09 |
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J. Pérez, V. Fernández
"Hierarchical and Pseudo-Random eIRA Codes Based on BIBDs and Primitive Interleavers"
IEEE International Conference on Wireless Information Networks and Systems, Setubal, Portugal. 2006-08 |
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J. Pérez, V. Fernández
"Near Random Performance of Structured eIRA Codes"
IEEE and IEE co-sponsored Signal Processing for Wireless Communications (SPWC) Workshop, London. 2006-05 |
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| 2005 |
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J. Pérez, V. Fernández
"Hardware Aware eIRA LDPC Code Generation"
IEEE International Symposium of Wireless Communication Systems 2005(ISWCS 2005), Siena, Italy. 2005-09 |
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J. Pérez, V. Fernández
"Optimizations in max-log-map LLRe VLSI architecture"
IEEE International Symposium on Signals, Circuits and Systems (ISSCS). Iasi (Romania)
. 2005-07 |
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| 2004 |
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J. Pérez, V. Fernández
"Optimizations in DVB-RCS Turbo Decoder Based on Trellis Structure"
XIX Conference on Design of Circuits and Integrated Systems (DCIS2004). Bordeaux. 2004-09 |
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J. Pérez, V. Fernández, H. Posadas, V. Fernández
"Estudio de viabilidad de DVB-S2 en Banda Ka"
Memoria técnica justificativa del proyecto PROFIT PNE-001/2003-EMP. 2004-04 |
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| 2003 |
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J. Pérez, P. Sánchez, V. Fernández
"FGPA Implementation of a MAP Decoder for DVB-S Satellite Reception"
XVIII Conference on Design of Circuits and Integrated Systems (DCIS2003). Ciudad Real. 2003-11 |
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| 2002 |
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J. Pérez, P. Sánchez
"FPGA implementation of DVB-RCS turbo coder and decoder"
Proceedings of the XVII Design of Circuits and Integrated Systems Conference, Servicio de Publicaciones de la Universidad de Cantabria. 2002-11 |
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