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Título: | High Speed Multi-Processors System-On-Chip Simulation Platforms for Hardware Dependent Software Development |
Tipo: | Comunicaciones a congresos internacionales |
Lugar: | 1st SoftSoC Workshop, Grenoble |
Fecha: | 2009-10 |
Autores: |
F. Pétrot (TIMA)
Eugenio Villar
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Líneas: |
Diseño y verificación de sistemas embebidos HW/SW
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Proyectos: |
MEDEA 2A714 SoftSoC
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ISBN: | |
Fichero: | ver fichero
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Resumen: | Efficient and precise simulation models are required in order to perform hardware dependent software (HdS) development and validations of Multi-Processor System-On-Chip (MPSoC) platforms. In this presentation, we illustrate two SystemC-based MPSoC platform implementations that allow native software simulation while keeping details of the underlying hardware model. Key common contributions of these works are an abstract, efficient model of the processor and a realistic memory mapping modeling that makes possible the simulation of Operating Systems and device drivers on complex hardware models with multiple processors. This method also allows the reuse of all HdS components for the target processor(s). In one of the cases, an abstract model of the OS is provided. 1st SoftSoC Workshop.
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