Grupo de Ingeniería Microelectrónica

Grupo de Ingeniería Microelectrónica

Departamento de Tecnología Electrónica, Ingeniería de Sistemas y Automática Universidad de Cantabria
Home   Personas   Investigación   Docencia   Doctorado   Publicaciones   Herramientas   Bolsa de Empleo   english version Sun 22-Dec-24 . 08:12



Mapa Web


Localización

Noticias

Info Santander



Gestión BD

GIM>Investigación>Publicación
   PUBLICACION
 
   Ficha completa
Título:The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration
Tipo:Articulo en revista internacional
Lugar:Microprocessors and Microsystems, V.37, N.8-C, Elsevier, pp.966-80
Fecha:2013-11
Autores: K. Grüttner
P.A. Hartmann
K. Hylla
S. Rosinger
W. Nebel
Fernando Herrera
Eugenio Villar
C. Brandolese
W. Fornaciari
G. Palermo
C. Ykman-Couvreur
D. Quaglia
F. Ferrero (GMV)
R. Valencia (GMV)
Líneas: Diseño y verificación de sistemas embebidos HW/SW
Proyectos: FP7 IP 247999 COMPLEX
ISBN:0141-9331
Fichero:
Resumen:The consideration of an embedded device’s power consumption and its management is increasingly important nowadays. Currently, it is not easily possible to integrate power information already during the platform exploration phase. In this paper, we discuss the design challenges of today’s heterogeneous HW/SW systems regarding power and complexity, both for platform vendors as well as system integrators.

As a result, we propose a reference framework and design flow concept that combines system-level power optimization techniques with platform-based rapid prototyping. Virtual executable prototypes are generated from MARTE/UML and functional C/C++ descriptions, which then allows to study different platforms, mapping alternatives, and power management strategies.

Our proposed flow combines system-level timing and power estimation techniques available in commercial tools with platform-based rapid prototyping. We propose an efficient code annotation technique for timing and power properties enabling fast host execution as well as adaptive collection of power traces. Combined with a flexible design-space exploration (DSE) approach our flow allows a trade-off analysis between different platforms, mapping alternatives, and optimization techniques, based on domain-specific workload scenarios. The proposed framework and design flow has been implemented in the COMPLEX FP7 European integrated project.
Paper
© Copyright GIM (TEISA-UC)    ¤    Todos los derechos Reservados.    ¤    Términos LegalesE-Mail Webmaster