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| GIM>Investigación>Publicación |
| PUBLICACION |
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| Ficha completa |
| Título: | Integrated Framework for Reusable Multi-Level Embedded System Verification |
| Tipo: | Comunicaciones a congresos internacionales |
| Lugar: | Work-in-Progress Session, DAC, San Francisco |
| Fecha: | 2018-06 |
| Autores: |
Álvaro Díaz
Eugenio Villar
Pablo Pedro Sánchez
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| Líneas: |
Diseño y verificación de sistemas embebidos HW/SW
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| Proyectos: |
ECSEL 737494-2 MegaMart2
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| ISBN: | |
| Fichero: | ver fichero
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| Resumen: | Embedded software verification is a task that differs with the traditional procedures of software or hardware verification. This is a complex task that involves not only the functional verification of the embedded application, but also the validation of platform-dependent non-functional requirements such as power consumption and execution time. Therefore, classical software verification methodologies based-on unit test frameworks have to be complemented with other techniques based-on virtual platforms and on-board testing. The challenge is to reuse the test set during a verification process that involves different techniques and frameworks.
This work proposes an integrated framework that improves the verification of functional and non-functional requirements during the embedded software verification process from the first steps to the final on-board validation. It enables the reuse of the same test benches while reducing test effort and verification time. |
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