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| GIM>Research>Publications |
| PUBLICATIONS in which "Iñigo Ugarte" participates ordered by research line |
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| Design and verification of HW/SW embedded systems |
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F. Herrera, I. Ugarte, E. Villar
"Towards automated implementation of adaptive systems from abstract SystemC specifications"
Design Automation of Embedded Systems, Springer. 2012-11 |
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I. Ugarte, P. Sánchez
"Formal Meaning of Coverage Metrics in Simulation-based Hardware Design Verification"
IEEE International High-Level Design Validation and Test Workshop
California. 2005-11 |
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I. Ugarte, P. Sánchez
"Path-oriented Assertion Checking of Cyclic Behavioral Descriptions"
Formal Methods and Models for Co-Design MEMOCODE'04
California. 2004-06 |
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I. Ugarte, P. Sánchez
"Functional Vector Generation for Assertion-Based Verification at Behavioral Level Using Interval Analysis"
IEEE International High Level Design Validation and Test Workshop HLDVT’03, San Francisco, CA. 2003-11 |
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I. Ugarte, P. Sánchez
"System Verification Based on Modified Interval Analysis"
European test Workshop, ETW’03. 2003-05 |
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I. Ugarte, P. Sánchez, E. Villar
"Metodología de Verificación y diseño para testabilidad digital"
Documento Entregable R3 del proyecto FEDER 1FD97-0791. 2002-03 |
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F. Herrera, C. Sánz, I. Ugarte, E. Villar
"Specification Components: Reusability at the HW/SW system specification level"
proc. of the VHDL International Users Forum, IEEE CS. 1999-10 |
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| Embedded Systems Specification |
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F. Herrera, I. Ugarte
"Concurrent Specification of Embedded Systems: An Insight into the Flexibility vs Correctness trade-off
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Kiyofumi Tanaka: "Embedded Systems - Theory and Design Methodology", InTech, Croatia. 2012-02 |
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