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| GIM>Investigación>Publicación |
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| Ficha completa |
| Título: | Fault Evaluation of a Distributed Preamplifying Stage of a High-Speed Folded ADC |
| Tipo: | Comunicaciones a congresos internacionales |
| Lugar: | XXV Conference on Design of Circuits and Integrated Systems, DCIS'10 |
| Fecha: | 2010-11 |
| Autores: |
Yolanda Lechuga
Román Mozuelos
Mar Martínez
Salvador Bracho
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| Líneas: |
Métodos de test de circuitos integrados digitales y mixtos
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| Proyectos: |
Métodos de Test Funcionales y Estructurales: Aplicacion al Autotest de Ci...
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| ISBN: | 978-846937393-4 |
| Fichero: |
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| Resumen: | This paper presents a fault evaluation of one of the
main building blocks of a high-speed folded and interpolated
ADC, the preamplifier that feeds the input of each sample and
hold module of a distributed S&H stage. First, the tolerance
ranges for the specifications of the preamplifier that ensure the
fulfillment of the overall ADC specifications have been obtained,
taking advantage of a high-level behavioral model, developed on
the MATLAB environment. Then, a catastrophic fault model has
been applied on a transistor level implementation of the ADC in
order to establish the values for the open, short and GOS
resistances of the model that actually degrade the ADC
performance. Finally, a structural Design-for-Test (DfT)
approach has been applied for the detection of these faults. |
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