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| GIM>Research>Publications |
| PUBLICATIONS in which "Iñigo Ugarte" participates ordered by date |
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| 2021 |
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V. Fernández, Carlos Abad, Angel Alvarez, I. Ugarte, P. Sánchez
"Pre-silicon FEC decoding verification on SoC FPGAs"
IEEE Communications Letters. 2021-01 |
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| 2019 |
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Angel Alvarez, I. Ugarte, V. Fernández, P. Sánchez
"Design Space Exploration in Heterogeneous Platforms Using OpenMP"
DCIS 2019. 2019-11 |
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Angel Alvarez, I. Ugarte, V. Fernández, P. Sánchez
"OpenMP Dynamic Device Offloading in Heterogeneous Platforms"
Fan X., de Supinski B., Sinnen O., Giacaman N. (eds) OpenMP: Conquering the Full Hardware Spectrum. IWOMP 2019. Lecture Notes in Computer Science, vol 11718. Springer, Cham. https://doi.org/10.1007/978-3-030-28596-8_8. 2019-08 |
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| 2016 |
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Angel Alvarez, I. Ugarte, P. Martínez, V. Fernández
"HW-SW Codesign of a Positioning System. UML to Implementation Case Study"
DCIS16. 2016-11 |
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Á. Díaz, A. Nicolás, I. Ugarte, P. Sánchez
"Designing embedded HW/SW systems with OpenMP"
FDL Forum on specification & Design Languages
September 12-14, 2016
Bremen, Germany. 2016-09 |
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| 2015 |
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H. Posadas, V. Fernández, I. Ugarte
"Teaching a Hardware Description Language with an Affordable, Easy-to-use Robotic Arm"
IEEE International Symposium on Computers in Education, SIIE. 2015-11 |
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| 2012 |
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F. Herrera, I. Ugarte, E. Villar
"Towards automated implementation of adaptive systems from abstract SystemC specifications"
Design Automation of Embedded Systems, Springer. 2012-11 |
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I. Ugarte, P. Sánchez, V. Fernández
"Motivation of students in the learning of digital electronics through the double integration: Remote/presential work and theoretical/laboratory classes "
Proceedings - 2012 Technologies Applied to Electronics Teaching (TAEE 2012). 2012-06 |
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F. Herrera, I. Ugarte
"Concurrent Specification of Embedded Systems: An Insight into the Flexibility vs Correctness trade-off
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Kiyofumi Tanaka: "Embedded Systems - Theory and Design Methodology", InTech, Croatia. 2012-02 |
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| 2011 |
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I. Ugarte, P. Sánchez
"Automatic vector generation guided by a functional metric"
SPIE Microtechnologies. 2011-04 |
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| 2009 |
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I. Ugarte
"Functional Verification Techniques of Digital System
(Técnicas de Verificación Funcional de Sistemas Digitales)"
Tesis Doctoral. Universidad de Cantabria.. 2009-06 |
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| 2008 |
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I. Ugarte, P. Sánchez
"Optimized Coverage-directed Random Simulation"
IEEE International High Level Design Validation and Test. 2008-11 |
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| 2007 |
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I. Ugarte, P. Sánchez
"Providing a Formal Meaning to Coverage Metrics
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XXII Conference on Design of Circuits and Integrated Systems. 2007-11 |
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I. Ugarte, P. Sánchez
"Analysis of Random Testbench for Data-Dominated Hardware Descriptions"
XII IEEE European Test Symposium. 2007-05 |
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| 2006 |
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I. Ugarte, P. Sánchez
"Optimizations in the Verification Technique of Automatic Assertion Checking with Non-linear Solver"
XXI Conference on Design of Circuits and Integrated Systems. 2006-11 |
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I. Ugarte, P. Sánchez
"Assertion-based Verification of Behavioral Descriptions with Non-linear Solver"
IEEE International High Level Design Validation and Test. 2006-11 |
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I. Ugarte, P. Sánchez
"Assertion Checking of Control Dominated Systems with Nonlinear Solvers"
IEEE International Conference on Formal Methods and Models for Co-Design. 2006-07 |
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| 2005 |
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I. Ugarte, P. Sánchez
"Verification of Embedded Systems Based on Interval Analysis"
International Journal of Parallel Programming, Vol. 33, No. 6,. 2005-12 |
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I. Ugarte, P. Sánchez
"Use of Non-linear Solver to Check Assertions of Behavioral Descriptions"
XX Conference on Design of Circuits and Integrated Systems (DCIS2005). Lisboa(P). 2005-11 |
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I. Ugarte, P. Sánchez
"Formal Meaning of Coverage Metrics in Simulation-based Hardware Design Verification"
IEEE International High-Level Design Validation and Test Workshop
California. 2005-11 |
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I. Ugarte, P. Sánchez
"Assertion Checking of Behavioral Descriptions with Non-linear Solver"
IEEE International Conference on Computer Design. 2005-10 |
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I. Ugarte, P. Sánchez
"Polynomial model-based evaluation of the branch
coverage metric for functional verification of hardware systems"
ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE'05).
Italy. 2005-07 |
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I. Ugarte, P. Sánchez
"Theoretical fundamentals of functional verification based on random test benches"
IEEE European Test Symposium ETS'05
Estonia. 2005-05 |
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| 2004 |
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I. Ugarte, P. Sánchez
"Assertion Checking of Cyclic Behavioral Descriptions"
XIX Conference on Design of Circuits and Integrated Systems DCIS'04
France. 2004-11 |
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I. Ugarte, P. Sánchez
"Path-oriented Assertion Checking of Cyclic Behavioral Descriptions"
Formal Methods and Models for Co-Design MEMOCODE'04
California. 2004-06 |
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| 2003 |
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I. Ugarte, P. Sánchez
"Functional Vector Generation for Assertion-Based Verification at Behavioral Level Using Interval Analysis"
IEEE International High Level Design Validation and Test Workshop HLDVT’03, San Francisco, CA. 2003-11 |
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I. Ugarte, P. Sánchez
"Using Modified Interval Analysis in System Verification"
XVIII Conference on Design of Circuits and Integrated Circuits DCIS'03
Ciudad Real. 2003-11 |
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I. Ugarte, P. Sánchez
"System Verification Based on Modified Interval Analysis"
European test Workshop, ETW’03. 2003-05 |
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| 2002 |
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I. Ugarte, P. Sánchez, E. Villar
"Metodología de Verificación y diseño para testabilidad digital"
Documento Entregable R3 del proyecto FEDER 1FD97-0791. 2002-03 |
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| 1999 |
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F. Herrera, C. Sánz, I. Ugarte, E. Villar
"Specification Components: Reusability at the HW/SW system specification level"
proc. of the VHDL International Users Forum, IEEE CS. 1999-10 |
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